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SN74LVC1G11 Single 3-Input Positive-AND Gate

1) If the device is upowered, and I apply 3.3Volts on all three inputs to the AND gate, will the inputs leak to the output and create an output voltage on the unpowered IC?

2) If I have 3.3Volts on the input leads, and then apply 3.3V to the power lead of the IC - will that create any latch up issues?

If I look at the data sheet it appears as though I can do this w/o latch up issues...but I would like to make sure cause I'm going from schematic to PCB.

 

Thank you for any support you can provide me.

Gene