Hi,
I have an issue with this IC. The IC is connected to an MCU operating at 5V. The IC function is to drive a half bridge consisting of a NMOS-PMOS couple with common drain. So the power mosfet gates are separated and connected to two different output pins of this IC.
Sometimes, when I apply the power to the electronic board, one of the NMOS-PMOS couple is shortcut because it may happen that voltage is high enough on NMOS gate and low enough on PMOS gate putting the board on a sort of latch-up because the PSU does not increase the voltage anymore due to excessive current absorption. Adding a capacitor at the input reduces drastically the probability of this event.
I have 3 hypothesis for this:
1. The driver IC is not working while input power transits from 0V up to 5V, so the status of the output is unknown but output impedance looks good enough to keep the same voltage level.
2. The driver IC is correctly working at lower voltages keeping all outputs safe at zero but the MCU is in unknown state. Therefore some output pins of the MCU may be at 1 while others may be at 0.
3. The ripple given by the PSU's voltage ringing may turn on the PMOS and NMOS thanks to the voltage differences created by the picks.
When this happen the lab. PSU goes in current protection and supply voltage level is around 3.5V to 4V: the minimum level to turn on the MCU, this suggests the second hypothesis is more realistic. I believe this issue can be solved adding pull-up/down resistors on the gates, but I need to understand where: at the MCU pins or at the power mosfet gates pins.
Can you exclude the first hypothesis to confirm the second? CD4504B datasheets are not accurate enough to specify if the IC has an undervoltage protection.
Thank you.
Regards,
Gianluca