TXS0108E as a data bus interface

Laszlo,

I'll have to get back to you on this, as I don't have an obvious explaination for this.

To summarize your problem statement - It appears that *sometimes*, Port B of the TXS0108E fails to adequately drive a low voltage from the FPGA side to the Processor side.

Some questions:

1. To be clear, one this problems ceases, it never re-appears?
2. Does this only happen with a specific read sequence?
3. Are the FPGA and processor (a) open-drain, or (b) push-pull?
4. Can you share your board schematic?

Best Regards,
Nirav

Hi Nirav,

Thank you for the fast response.

1. Yes. The problem mostly happens after first switch-on. After some minutes on time (1-2) it ceases. It never re-appears until I switch off the board, and wait some minutes before the next switching on. This is a proto board. First I had 5 pcs. manufactured. With that batch I did not have the problem. Then I needed some more boards for evaluation, so I again had 5 pcs. manufactured. From this batch more than one of the boards produce this error. I selected the "worst", and made oscilloscope measurements on it.

2. As far as I can tell, no. I implemented an MDA display memory in the FPGA. There is a 4k memory at 0xB0000 address on the ISA bus. When scrolling this memory, the program reads 4 consecutive bytes from the memory, then writes them to another location. First I found the erroneous reads only at the first read, I attached such oscilloscope screenshot. But later I found erroneous reads at other reads too.

3. As the data bus is bidirectional, the FPGA output data is driven with a tri-state driver. The processor read signal enables the tri-state driver to drive the bus. I measured the data bus at the FPGA output (pink on the scope screenshot), and it seems OK. According to data sheet, when driving the TXS0108E with an open-drain driver, only the low to high transition would be delayed with some hundreds of nanosecs, the high to low transition should be quite fast.

4. I attached the related parts of the board schematic. J16 is a connector for a SODIMM 144 Socket PC (DIMMBoard DX86), by b-plus GmbH.

Best regards,

Laszlo

Laszlo,

Please bear with me as I try to debug this issue - Would you mind trying the following scenarios?

#1 - Related to settling time

1. Power up a failing proto board

2. Leave it idle for 2-3 minutes (i.e. no writes/reads)

3. Perform a write/read. Do you still observe the error?

#2 - Does the failure folow the TXS0108E, or the proto-board?

Since 5 proto boards are passing and the other 5 are failing, please try the following:

1. Transfer one TXS0108E from the failing proto board to the passing proto board, and re-test the passing proto-board. Does the failure follow the unit?

2. Transfer one TXS0108E from the passing proto board to the failing proto board, and re-test the failing proto-board. Does the failure follow the proto-board?

Best Regards,

Nirav

Nirav,

#1 - Related to settling time

After 5 minutes idle (power is on), I do not observe the error any more. After 3 minutes idle there were some errors, but much fewer than after power on.

#2 - Does the failure follow the TXS0108E, or the proto board.

It seemed to be a very good idea. But the result was quite strange. After exchanging the TXS0108Es between the good and the failing board, the failure never happened again, neither on the good, nor on the failing board. I tried to apply some cooling to the chips to emulate the power off state, but there was still no error. I tried longer switch off times, still no error. Some soldering problem on the original board? But how can it take effect? And there are other boards, that produces the error, but quite rarely.

Unfortunately I have only one more board to experiment with, all the others were assembled into proto equipment. This board produces the error, but very much more rarely than the one, I previously experimented with.

Best regards,

Laszlo

Nirav,

I continued the experimentation with the TXS0108E. I wrote, that exchanging the TXS0108Es between the good, and bad boards fixed both boards. After that we exchanged the TXS0108Es again, and the previously bad board became bad again.
I made some oscilloscope measurements and found the following.
At some cycles (always high to low transition) the signal goes to low very slowly. On the bad board, it takes about 500-550 ns to go low. On the good board it takes less then 200 ns. The read cycle of the processor board is about 600 ns. So the setup time (data is stable before the rising edge of read) is not always enough. The processor sometimes reads a '1' instead of the '0'.
I exchanged the processor boards between the boards and found out that it has some effect too. It seems that the TXS0108E and the processor board together can cause the problem.
The worst high to low setup time I measured was about 550 ns. As the read cycle time can be increased in the BIOS, I increased its wait cycles from 4 to 5 (in 8.33 MHz bus ISA clock). As the read cycle time was increased by 120 ns, all the bad reads ceased.
Though I could not find out from the TXS0108E datasheet, why this slow high to low transition happens, it seems I found a workaround.

Best regards,
Laszlo

Laszlo,

Glad to hear about the workaround. Large capacitive loading or weak drive strength of the processor can increase the fall time, but I would assume that to impact every instance of a falling edge, which we don't observe on your setup.

Regarding the 200 ns vs. 550 ns fall times - Was the input fall time into the TXS0108E the same in both cases?

Best Regards,
Nirav