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SN74121

Jongsik Kim
Prodigy 10 points
Other Parts Discussed in Thread: SN74121

Hi,

I am decreasing the duty cycle of TTL input signal (100kHz, duty cycle 50%) to 10%.  The input signal was generated using a function generater(Stanford Research System, DS345).  According to the datasheet of SN74121, there should be no jittering on the output signal (jitter free operation up to 90%).     

However, I found out that the output show about 5ns jitter on the rising edge and the falling edge.   

Can anyone explain why this is happening?

  • 0
    TI__Guru 59770 points
    Hi Kim ,

    Does the function generator spec have jitter free operation at 10% duty cycle ?
    Does the jitter on the output occur at 50% or 90% dutycycle ?
    Do you have the right values and tolerances of the external components and as suggested by the datasheet ? Good bypass caps close to the Vcc pin ?