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SN74AUP2G14 current draw

The spec describes a  Icc

VI = GND or (VCC to 3.6 V), ICC 0.8 V to 3.6 V 0.5 0.9 μA

and then something called delta Iccc  

ΔICC VI = VCC – 0.6 V (1) , IO = 0 3.3 V 40 50 μA

What is this? I would like to create a nearly zero power low freq clock signal, but this part I cant understad what it is or even what condition they are defining.

Shall I understand that as long as the Vi is at VCC or ground then you get  <1u but if you sag to .6V under VCC the you start to dway power?  That would make some sence though they did not make the same condition for a grounded Vi with some small offett

Is there any way to predict the dynamic current draw?

  • Hi Steve ,

    Yes , you are right on that definition . The Icc is the quiescent current when the device is in normal operation with inputs at one of the rails .
    The delta Icc is when the inputs are offset from the rails and is spec'ed by either 0.6V away or 0.3V depending on the family and devices .
    The typical curve , the max icc consumption happens around Vcc/2 when both the MOSFETs are turned on and current from Vcc goes to gnd .This is not a good or recommended condition to have for longer periods of time which can cause thermal breakdown of the device.