D Latch

Patrick Chen

Other Parts Discussed in Thread: SN74LVC74A, SN74LVC1G373

Hello

Do we have D-Latch or D-Flip Flop as SN74LVC74A. They need CLK already HIGH to let Q output change status. CLR low let Q output low while MCU initial for default status. Thank you.

Patrick

over 10 years ago

0 ShreyasRao over 10 years ago

TI__Guru 64110 points

Hi Patrick ,

It seems that you are looking for level triggered flip flop when you say that the high level needs to trigger the output Q ?

I can look into the options we have on this .

0 ShreyasRao over 10 years ago in reply to ShreyasRao

TI__Guru 64110 points

Hi Patrick ,

You could use the preset and clear inputs to override the clock to change the output Q asynchronously in the SN74LVC74A.
You can also consider using sn74lvc1g373 where the output level is determined by the latch enable pin and hence independent of the clock input .

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D Latch