Hello
Do we have D-Latch or D-Flip Flop as SN74LVC74A. They need CLK already HIGH to let Q output change status. CLR low let Q output low while MCU initial for default status. Thank you.
BR
Patrick
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Hello
Do we have D-Latch or D-Flip Flop as SN74LVC74A. They need CLK already HIGH to let Q output change status. CLR low let Q output low while MCU initial for default status. Thank you.
BR
Patrick
Hi Patrick ,
You could use the preset and clear inputs to override the clock to change the output Q asynchronously in the SN74LVC74A.
You can also consider using sn74lvc1g373 where the output level is determined by the latch enable pin and hence independent of the clock input .