• State Resolved
  • Locked Locked
  • Replies 1 reply
  • Subscribers 19 subscribers
  • Views 1010 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

SN74LVC1G125DCKR - input transition rise or fall time Δt/ΔV

Hirotaka Matsumoto
Guru 27585 points

Hi all

Would you mind if we ask SN74LVC1G125DCKR?

If it can't satisfy input transition rise or fall time  Δt/ΔV, does the device cause of permanent damage?
Or it can't satisfy Electric parameter?

Kind regards,

Hirotaka Matsumoto

  • 0
    Guru 316470 points

    Implications of Slow or Floating CMOS Inputs (SCBA004) says:

    … when switching from one state to another, the input crosses the threshold region, causing the n-channel and the p-channel to turn on simultaneously, generating a current path between VCC and GND. This current surge can be damaging, depending on the length of time that the input is in the threshold region (0.8 to 2 V).
    […]
    If a voltage between 0.8 V and 2 V is applied to the input for a prolonged period of time, this situation becomes critical and should not be ignored, especially with higher bit count and more dense packages (SSOP, TSSOP). For example, if an 18-bit transceiver has 36 I/O pins floating at the threshold, the current from VCC can be as high as 150 mA to 200 mA. This is approximately 1 W of power consumed by the device, which leads to a serious overheating problem. This continuous overheating of the device affects its reliability. Also, because the inputs are in the threshold region, the outputs tend to oscillate, resulting in damage to the internal circuit over a long period of time.