Input capacitance for SN74LVT245B and SN74BCT760 when in high impedance state

Hi Madhu,

The datasheet specifies for SN74LVT245B that the C_io which is the capacitance you are looking for to be 9 pF.

The datasheet specifies for SN74BCT760 that the C_i  which is the capacitance you are looking for to be 10 pF.

Please note that the reason the first device has IO instead of O like the second device is because the SN74LVT245B device outputs also function as inputs.

Thanks,

Daniel

Hi,

Thanks for the quick reply.

As per my understanding, Cio / Co represents the input and output capacitance when the device is active. But my question is different. Please refer the attached image. When Buffer B present in one board is high impedance state, some other Buffer A, present in other board will drive the line. In that case, what will be the load capacitance of output line of buffer B seen by A?

Thanks & Regards

Madhu Sharma K

Hi Daniel,

Thanks for the reply....
Then how to determine the maximum load capacitance that is expected at the output for proper functioning of the device?

Regards
Madhu sharma

Hi Madhu,

The maximum capacitance that you can load a device with isn't something that is normally defined. There isn't so much as a maximum load capacitance of the device as there is a limit on some of the effects you would see from large capacitive loads.

Large capacitive loads can try to push current through the device when discharged that is larger than our maximum current spec than the device which breaks the warranty on the device. In this case I suggest a current limiting resistor.

Large capacitive loads can also slow down the operation of the devices by increasing the propagation delay.

If you are worried about the output capacitance of one of the ICs you listed in the forum messing with the operation of the other one, the output capacitances of those devices are not large enough to disrupt normal operation of the devices.

Thanks,
Daniel

Hi Daniel,

I'm using the buffer to drive the VME bus and since VME bus has 21 board slots and includes long traces, the load capacitance will be large, about 400pF. Please let me know whether load capacitance of this range would disturb the normal operation.

Thanks & Regards

Madhu Sharma K

Hi Madhu,

A capacitance that large will increase the propagation delay beyond what we show in the datasheets as those characteristics are not characterized out to 400pF. It is unlikely to drastically change the normal operation of the device other than slowing the device down.

Thanks,
Daniel

Hi Daniel,

Thanks for the quick response.

While the buffer drivers the line high, there is a possibility of drawing a large current momentarily, since the load capacitance is large. Is there any possibility that the buffer gets damaged due to this current?

Regards
Madhu Sharma

Hi Madhu,

Although a possibility, the capacitance you stated isn't that large and thus it will be highly unlikely to damage the part. If you are still worried about that large spike in current I would suggest a current limiting resistor in your design to be on the careful side.

Thanks,
Daniel

Hi Daniel,

Connecting a series current limiting resistor would include a voltage drop and reduce the output voltage. Is there any other way to limit this spike?

Regards
Madhu Sharma K

Hey Madhu,

A current limiting resistor is really the only solution, also depending on where the traces go there won't be a massive voltage drop at the output.
I was wondering however if you considered one of our parts that are used for VME busses such as our SN74VMEH22501.

In either case, where are the extremely long traces going to?

Thanks,
Daniel

Hi Daniel,

What are the major differences between the two buffers?

The VME standard allows 21 boards to connect to a backplane. The traces will be long ( about 50 cm) since the traces are common for all 21 slots.

Regards
Madhu Sharma K

Hey Madhu,

There isn't really a way to limit this spike outside of a current limiting resistor, although I wouldn't worry so much about the spike since the capacitance isn't that crazy. I was also wondering if you had checked out our bus transceivers that are made for this kind of application. They would certainly be able to handle the higher capacitance load. Something like the SN74VMEH22501

Thanks,
Daniel

Hai Daniel,

Thanks for the reply.

I have gone through datasheet of  SN74VMEH22501 and since i need industrial grade components, I am planning to use SN74VMEH22501A. But there is one more part, with part number SN74VMEH22501A-EP. What are the differences between these two?

Also, When I use SN74VMEH22501A in Transparent mode, since i am not using the clock signals, how should i connect the two clock pins ( CLKAB & CLKBA)?

Regards

Madhu Sharma

Hey Madhu,

EP stands for enhanced product and generally refers to an increase in Temperature operation range.

As far as how to connect the CLK pins since you aren't using them refer to the highlighted portion of the datasheet. They should be tied to GND or Vcc to ensure proper device operation.

Thanks,

Daniel Hartung

Hi Daniel,

1) The datasheet tells to connect the control pins to VCC or GND. While connecting to GND, Can I Connect directly or should I use a resistor?

2) In VME bus, there are some signals which are Open drain/collector. Can you please suggest me any such buffers which are designed/tested for VME interface?

Regards

Madhu Sharma

Hey Madhu,

1) I refer you to page 2 on the datasheet:

2) We don't have any buffer/drivers specifically made for VME interface, but I imagine that you can find a buffer/driver that is suitable for your application in our buffer/driver products here:

http://www.ti.com/lsds/ti/logic/non-inverting-buffer-driver-products.page

Thanks,

Daniel

Hi Daniel,

For SN74VMEH22501A: 

1) I am planning to connect the data lines to all the 10 pins. Can I short 1A and 1Y lines ( and 2A and 2Y) to make the 1 bit transceivers bidirectional?

2) If 1A and 1Y are shorted what is the differences ( based on performance) between 8 bit UBTs and 1 bit transceivers? can those be used as bus transceivers?

3) Will there be any harm to the device if a pull up is connected for the output pins ( 1B, 2B and 3B pins)?

Regards

Madhu Sharma

Hey Madhu,

1) I would be scared of if 1A and 1Y were ever different values of each other. If one pin wants to force low and the other wants to force high you could have a problem.

3) The device should be fine with you connecting pull up resistors. Make sure the resistors are big enough though if you plan on the device sinking any of the current to not go above max value for the current on that pin.

Thanks,
Daniel

Hi Daniel,

In the datasheet of SN74VMEH22501A in page 4, it is mentioned that- "The OEBY and OEAB inputs can be tied together to form a simple direction control where an input high yields A data to B bus and an input low yields B data to Y bus".

So please let me know in this case, whether it is possible to short A and Y pins?

Regards
Madhu Sharma

Hey Madhu,

In that case it should be fine since the Output enables are tied together. If they were not tied together you might have problems with looping your output back into your input. You should be able to tie A and Y together.

Thanks,
Daniel