I am trying to help validate a customer design.
They are using an LVTH244 as a buffer in an I2C circuit. The source driver is open drain, and thus the circuit has a required pullup that is not recommended for bus hold circuits. The pullup is sourcing ~6ma, so this should not be a concern with conflicting with the bus hold current.
The real question comes in with the rise time. The circuit has a slew rate of about 72ns/V. This is significantly greater than the ROC value of 10ns/V max.
However, there is not an absolute max slew rate defined.
Does this pose a reliability risk with slow rise time?
Does this pose a risk of oscillation on output, or does any hysteresis introduced from the bus hold feedback prevent this?
Thanks,
Wade