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TXS0108E capabilities

Other Parts Discussed in Thread: TXS0108E

We're looking to replace an obsolete part in a TTL system with an FPGA. This will require interfacing the FPGA's 3.3V bus with the bidirectional TTL data bus.

We're considering using the TXS0108, but have a few questions:

1. We've observed that the TXB010x is unable to drive the capacitive loads of our bus. Do you know what loads the TXS0108 can drive?

2. We require a sensible failure mode if bus arbitration fails. Does the chip contain any internal protection against both sides being driven at once (i.e. A1 is driven to 0V, B1 to 5V)? What is the expected behaviour in this case?

 

 

  • Sorry for the delayed reply.

     

    1. The TXS drive strength is only equal to strength of the pull-up resistors on the low-to-high transition, and the device driving a low in the high-to-low transition. It's not recommended for loads greater than 70pF.

    We have an applications note that helps describe some of the TXS features.

    http://focus.ti.com/general/docs/litabsmultiplefilelist.tsp?literatureNumber=scea044

     

    2.  I will have to investigate further what will happen in this case.

  • Hello,

    sorry, I would prefer to do not start a new discussion and to place my question here. What does that mean "and the device driving a low in the high-to-low transition"? How does the device drive a "low" exactly? Is that accomplished by using of R1/R2 and Npass transistor? I learned that P/N-MOS transistors P1/2 and N1/2 are responsible for speeding up of signal transition but not for signal level, is that right?

    Best Regards.

  • Hi Vitali,

    In this case what they are referring to is actually an external device. The TXS0108E is not the device that is driving low.

    In open drain applications there is an external device that will only pulldown on the bus. I have highlighted in red the current path in the diagram above in a normal TXS0108E application.

    Once the external device switches on and A begins to fall to GND, N2 starts to turn on and current begins to flow from the 10k pull-ups to the external device through N2. The voltage at B will then track the voltage at A with some offset due to the voltage drop across the FET N2.

    This is why the high to low transition is only dependent upon the drive strength of the external device (ie the quicker the external device pulls down on A the quicker B will fall).

    Regards,
    Chris Kraft 

  • Hello Chris,

    thank you very much!

    Best Regards