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The LSF0102 isn't like most logic devices. It's basically a single pass transistor on each channel that turns off (ie goes high impedance) when the input reaches a certain threshold. The output edge rate will be a function of the input signal + the delay across that transistor (which is ~1ns) + the RC curve of the distant end. For this reason, there isn't a listed maximum. You could theoretically have an edge that take seconds to rise, or one that takes nanoseconds depending on load conditions.
Thanks for the input follow-up from the customer: if there is a typical specification why not also include a max specification?
In other words, if certain assumptions were made for "typ", then "max" should assume the worst case P/V/T excursion for the chip to show max (for the same "typ" assumption).
