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LSF0102: TRANSLATOR LSF0102DQER and SN74LV4T125PWR

Shu-Cheng LIN
Guru 11785 points
Part Number: LSF0102
Other Parts Discussed in Thread: SN74LV4T125, , SN74LVC1G07

Hi Sirs,

Could you help check if attached SCH is OK?

Schematic: 

SCHEMATIC1 _.output-new.pdf

We use LSF0102 for I2C and SN74LV4T125 for I2S

Some questions as below

LSF0102

  1. Why Vref_A don’t need cap?
  2. Why Vref_B need through 200Kohm to VDD?
  3. 2.2K pull high is OK?

 

SN74LV4T125

  1. It’s low active right?
  • 0
    TI__Guru* 97046 points

    Hi Shu-Cheng,

    I would highly recommend watching our short video series on the LSF -- it will help you to understand how the device works and answer all your above questions.

    I made a couple mentions here -- I don't see pull-up resistors on the A1/A2 side of the LSF.  Since this is I2C, pull-ups will need to be connected to every driver in the system or it will not work.

    C4803 is not necessary, but also won't hurt anything.

    The AUD_OUT_AMP_PWR_EN connection _must_ be open-drain or it will cause the translation to fail.  This is explained in the above video series, specifically the video on how to use the enable pin of the LSF.

    The enable pin for the SN74LV4T125 is active low (as indicated in the datasheet). The use of this device appears correct in the attached schematic.

  • 0 in reply to Emrys Maier
    Guru 11785 points

    Hi Sirs,

    Many thanks for your quick reply.

    We update SCH as below, Could you help check again?

    SCHEMATIC1 _ 48.output-new.pdf

    1. R4805, R4806 is I2C pull up resistor at A1/A2 side
    2. If part with green word “NM”, it means this part won’t smt
    3. I has delete net AUD_OUT_AMP_PWR_EN connect to LSF0102 EN pin

  • 0 in reply to Shu-Cheng LIN
    TI__Guru* 97046 points
    Hi Shu-Cheng,
    The schematic looks good from our side. The pull-up values might have to be adjusted depending on the driver strength, but that's a very easy fix at the prototyping/testing stage. The 1.8V pull-up resistors can typically be much larger in value (10kohm) to reduce the total current requirement for the drivers. Note that when the line is being driven low, all the pull-ups are essentially in parallel (but act separately when the line is high).
  • 0 in reply to Emrys Maier
    Guru 11785 points
    Hi Sirs,
    Thanks for your help .
    One more question,
    When EN and Vref_B floating and Vref_A=1.8V
    Is it in H-Z status? or unknow state?
    Because by our design, sometimes AUD_PWR_1P8 turn on but AUD_AMP_3V3 will turn off
  • 0 in reply to Shu-Cheng LIN
    TI__Guru* 97046 points
    Hi Shu-Cheng,
    Typically when a supply is turned off, it is at or very close to 0V.

    Current will not flow through the bias nFET unless the voltage across it is at least Vref_A + 0.85V, and the bias voltage will be equal to whatever floating voltage is on AUD_AMP_3V3 (because zero current means zero voltage drop across the 200kohm resistor). It is possible that the voltage could float high enough to allow some signals to pass through the device, but it is unlikely.

    If this is a major concern, then either the supply line should be forced to zero when turned off or the enable pin should be forced to zero via an open-drain driver (such as the SN74LVC1G07).