SN74LVC1G125: _OE and Vcc off timing for Ioff function

masahiko shimizu

Other Parts Discussed in Thread: SN74LVC1G125, SN74LVC1G34

rt Number: SN74LVC1G125

Hi,

My customer is using SN74LVC1G125 in below circuit.
Customer want to avoid pump of VccB when VccB is not supplied.
Customer will input High level to _OE before power down VccB from MCU.
Could you answer below questions for doing complete Ioff, please?

Q1: For avoid pump of VccB by source current from VccA, How long time should customer wait between High input of _OE and power down of VccB?

Q2: Should we watch the slope of power down VccB voltage after _OE is high? Does this device have limitation of voltage slope for Ioff function?

Best regards,
Shimizu

over 7 years ago

0 Emrys Maier over 7 years ago

TI__Guru* 97046 points

Hello Shimizu-san,
As with the other part (LVC1G34) the SN74LVC1G125 does not have input clamp diodes and thus does not provide a path for current from VccA to VccB. The inputs are high impedance 100% of the time (power on or power off).

It's likely that this issue is coming from somewhere else in the system.

0 masahiko shimizu over 7 years ago in reply to Emrys Maier

Guru 11235 points

Hi Emrys,

Thank you for your reply.
How about is the case of using input-line to MCU as below?

Best regards,
Shimizu

0 Emrys Maier over 7 years ago in reply to masahiko shimizu

TI__Guru* 97046 points

Hello Shimizu-san,

The SN74LVC1G125 operates very similarly to the SN74LVC1G34 when the OE\ pin is held low, so the answer will be the same as I gave here for that case.

If the OE\ pin is held high, then the output will be in a high-impedance state regardless of VccB.

Logic

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SN74LVC1G125: _OE and Vcc off timing for Ioff function