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SN74LVC125A: channel isolation

Andrew Du
Intellectual 1840 points
Part Number: SN74LVC125A

HI, Team:

What is the isolation between the different channel?

my customer found one of the channel transmitter the CLK signal and coupler to other channel, which transmitter data, like below chart?

Do we have any suggestion to fix this problem?

  • 0
    TI__Guru* 96862 points
    Hello Andrew,
    Can you provide a schematic and layout, each indicating the signal locations on the o-scope shot?
    Also it would very be helpful to get a scope shot including ground and Vcc rails at the device.
  • 0 in reply to Emrys Maier
    TI__Intellectual 1840 points

    Hello, Emrys

    Component is on the bottom layer, Power is on the third layer, the GND is on the second layer. Total 4 layer product.

  • 0 in reply to Andrew Du
    TI__Guru* 96862 points
    Hi Andrew,
    I'm quite confused. Your original question was about the SN74LVC125, which is a CMOS buffer, but the schematic above shows a quad AND gate, and I don't know which pins were measured on the scope shot.

    Please clarify.
  • 0 in reply to Andrew Du
    Guru 281490 points
    This is probably switching noise on the power lines. Was this measured with the load shown (R123 = 1 kΩ), which would result in a switched current of 3.3 mA?

    Where is the decoupling capacitor (C434)?
  • 0 in reply to Emrys Maier
    TI__Intellectual 1840 points
    Hi, Emrys:
    The device LC125XMX is other vendor's device and pin 2 pin with SN74LVC125. The customer use both of these two devices and found this issue on the SN74LVC125. The plot show the waveform of TDI_EPLD and TCK_EPLD. And they found there are noise on the TDI_EPLD. Other pins such as TDO and TMS data line also have such noise. The TCK frequency is 10MHz. Would you check if there are switch noise coupler to other channel from a 10MHz clock channel? Thanks!
  • 0 in reply to Andrew Du
    TI__Guru* 96862 points
    Thank you Andrew, you have been very patient and helpful.

    The reason I originally asked for a scope shot including Vcc and GND is because I think Clemens is correct -- this looks like coupling through the supply, which could be improved through a decoupling cap placed as close as possible to the Vcc/GND pins of the device.

    It would very be helpful to get a scope shot including ground and Vcc rails at the device (along with the noisy signal).
  • 0 in reply to Emrys Maier
    TI__Intellectual 1840 points

    Hi, Emrys:

    The customer feedback the waveform as your request; they didn't find the noise ont the 3.3V and GND. The noise is only on the TDI/TDO and TCK.

    Would you did a test or verify this with design team? Thanks!

    TDI & GND

    TDI&3.3V

    TCK & GND

    TCK & 3.3V

  • 0 in reply to Andrew Du
    TI__Guru* 96862 points
    Thanks Andrew,
    I have ordered samples and it will take a couple days for me to test in the lab. I am surprised to see that the noise is not coupling through the supply pin, and I will definitely test this locally.

    I was wondering though, the noise looks pretty minimal, and on a digital line it shouldn't cause any issues. Do you know what their concern is? Is there a VIH/VIL restriction on the next stage that would be violated by the ~300mV of noise on there? Is this signal being used for some type of analog connection maybe?
  • 0 in reply to Emrys Maier
    TI__Guru* 96862 points
    I have been able to verify in the lab here that this device does see pretty significant spikes across channels on fast edges. In my test setup, across temperature (worst at -40C) I saw between ~550mV pk to pk and ~900mV pk to pk.

    Unfortunately, that's just how the part performs. We don't guarantee crosstalk in this type of device. In most logic systems, this shouldn't cause any problems however. If they have a specific concern, I would like to hear about it so we can implement improvements in future products.