Hi,
Please let me ask the output state at less than 1.65V. Is it unstable, Hi-Z or Low output?
Best Regards,
Satoshi / Japan Disty
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Hi,
Please let me ask the output state at less than 1.65V. Is it unstable, Hi-Z or Low output?
Best Regards,
Satoshi / Japan Disty
Hello Satoshi-san,
If the OE pin is asserted, the output will remain in the high-impedance state during power up or power down, as indicated by this statement in the datasheet, page 10:
To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.
Because this device has the 'Ioff - partial power down protection' feature, the output will be in a high-impedance state when the supply pin is near 0V (<400mV).
In all other circumstances, the output is not guaranteed to be in any particular state.
It is common for simple devices like this to continue to operate well below their rated voltage range, so you should expect to see the device acting like a buffer if the output is enabled. At some point, the transistors will not have enough voltage (VDS) to operate correctly, and the output will become unpredictable. As previously stated, this is neither specified nor guaranteed by TI.
Hello Satoshi-san,
That was the rest of my post:
If the OE pin is NOT asserted:
Because this device has the 'Ioff - partial power down protection' feature, the output will be in a high-impedance state when the supply pin is near 0V (<400mV).
In all other circumstances, the output is not guaranteed to be in any particular state.
It is common for simple devices like this to continue to operate well below their rated voltage range, so you should expect to see the device acting like a buffer if the output is enabled. At some point, the transistors will not have enough voltage (VDS) to operate correctly, and the output will become unpredictable. As previously stated, this is neither specified nor guaranteed by TI.