CD74HCT393: Counter outputs is not follow Truth Table for 'CD74HCT393M'

Elangovan Mathaiyan47

Part Number: CD74HCT393

Hi,

Please Refer the attached Waveform captured at pin 1MR & 1CP. Once MR become Low, the output Q0Q1Q2Q3 should be 0000 for first Falling Edge of Clock pulse as per Truth Table.

But why i am getting 1000? is anything misunderstood the Logic? Can anybody help me explain why?

Thanks,

over 7 years ago

0 Emrys Maier over 7 years ago

TI__Guru* 97046 points

Hello,
I would recommend looking at the edges very closely. This is an analog device, so it is very sensitive to changes on the inputs and will (essentially) change instantaneously to minor signal spikes.

It sounds like the device is showing a count of "1" which means it's seeing a pulse after the master reset. Can you delay the rising edge of your clock pulse until slightly after the master reset so the two events are separated?

Also, can you provide a scope shot showing the edge of the clock signal, preferably at a <100ns/div scale.

0 Elangovan Mathaiyan47 over 7 years ago in reply to Emrys Maier

Prodigy 105 points

Hi,

Please Refer the waveform captured at 1MR (Blue) vs 1CP# (Yellow). I dont see any spikes/glitches in 1CP# after Master Reset.

Please guide me n solving this issue.

Thanks.

0 Emrys Maier over 7 years ago in reply to Elangovan Mathaiyan47

TI__Guru* 97046 points

You're right - those edges look very good.

I see that you have a 2 channel scope, so getting all 4 channels is probably not possible.

Can you get a scope shot of 1MR and 1Q0 together and another shot of 1CK and 1Q0 together? (triggering off 1MR falling edge on each)

I just want to get a good look at the issue you're talking about so I can try to reproduce it here.

0 Elangovan Mathaiyan47 over 7 years ago in reply to Emrys Maier

Prodigy 105 points

Hi,

Please find the attachment. Waveform captured at Expected pins.

Thanks.CD74HCT393M_Waveforms.zip

0 Emrys Maier over 7 years ago in reply to Elangovan Mathaiyan47

TI__Guru* 97046 points

Hello,

It looks like the counter is working correctly based on these scope shots. I aligned the two images to show when the clock pulses happen relative to one another, and marked the falling edges to make it easy to discern the count.

Also, the master reset appears to be correct:

Perhaps there is a different issue in the system?

Logic

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CD74HCT393: Counter outputs is not follow Truth Table for 'CD74HCT393M'