I need to generate a variety of pulses ranging from 125 ns to 800 ns for a digital phase delay network, using VCC = 3.3V.
I was planning on using CEXT = 100 pF.
The data sheet has no K vs VCC curve for CEXT = 100 pF, and its clear from Figure 4 that some non-linearity is kicking at and below CEXT = 100 pF that is extending the pulse width.
It would also be helpful to have some idea how much the pulse width might vary unit-to-unit assuming REXT, CEXT are ideal.
Obviously the tolerance of the external components is first order contributor, but there is probably some IC variation as well.
Please let me know the best way to find REXT assuming CEXT = 100 pF and VCC = 3.3V.
Thanks, Best, Steve