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SN74LVC07A-Q1: What's SN74LVC07A supported maximum frequency?

Alpha Han
Expert 3750 points
Part Number: SN74LVC07A-Q1
Other Parts Discussed in Thread: SN74LVC07A,

Hi, Team:

What's SN74LVC07A supported maximum frequency?

The background is we DIN SN74LVC07A-Q1 in Visteon project as IIS level shift from 1.8V to 3.3V which using12.288MHz MCLK.

When using 500ohm pull up to 3.3V in output, the output signal rising edge is very slow which has impact the audio performance.  And when change the pull up resistor to 200ohm, the rising edge seems OK but looks like it violate the maximum IOL parameters in datasheet (which should between 4mA to 12mA but didn't specify detailed in datasheet).

I attached customer schematic and captured waveform FYI.

Can you help to check:

1. if it's OK with 200ohm pull up?

2. why the rising edge is so slow?  Our datasheet is testing with 10MHz input signal.

3. why datasheet test circuit using 2*VCC pull up together with two resistor divide?

4. What's SN74LVC07A supported maximum frequency?

SN74LVC07A.docx

  • 0
    TI__Mastermind 45725 points
    Hi Alpha,

    So I will start off by saying that I wouldn't really recommend an open drain device for a clock signal at that high of a frequency.

    1. I can't recommend using a 200 ohm because as you stated it violates the recommended IOL.
    2. You are pulling up the voltage to 3.3V with a resistor. There is a RC time constant that controls this when you add in the output capacitance. Bigger the resistor, the slower the edge.
    3. It's a visual representation of the test set-up used for the timing specs
    4. Again, this will depend on the load
  • 0 in reply to Dylan Hubbard
    TI__Expert 3750 points

    Hi, Dylan:

    Thanks for the feedback. I don't think the total cap in the output is that much but some other parameters affect the rising time. Can you help to check if it related with SN74LVC07A itself?

    Besides, looks like AXC device don't have Q grade now.

  • 0 in reply to Alpha Han
    TI__Mastermind 45725 points

    Hi Alpha,

    It is related to the SN74LVC07A since it is open-drain. There is no driver for the high output which is why you need a pull-up resistor to pull this signal high. See image below, I simulated it to help you understand.

    The red plot is the 15pF capacitor charging and the green plot is a 12MHz square wave. The output will be driven low before it reaches 3.3 V. 15pF for output is reasonable to assume since the o'scope probes add several pF alone.