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SN74ALVCH16244: Power Good goes low being connected to Buffer IC

Part Number: SN74ALVCH16244
Other Parts Discussed in Thread: TPS51200

Hello!

I have a custom board with a number of power sources, including TPS51200 and TPS81230, which have PowerGood (PG) outputs. They are connected to buffer IC like shown on the first picture.

In that case PGs of each source are always low, while output voltages of the sources are good and the entire device is OK.

Then I cut the trace to disconnect the PG signal from buffer and see PG is high! It is also high with the simple switch as shown on the second picture.

Buffer IC was changed with a new one without any effect. The second board with the same schematic has the same problem with PGs.

I've successfully used those buffers before, what's wrong with them now?

Many thanks for help!

With regards,

Maksim

  • Hi Maksim,

    How are the power rails sequencing? I see there are two different net names for the supply for the pull-up and the supply for the buffer.
    Will it be possible to get scope shots of the VCC_3V3_MPSOC_IO, VCC_3V3_AUX_IO, and VTERM_Powergood (all in one capture) during power up?
  • Hi, Dylan!

    VCC_3V3_MPSOC_IO and VCC_3V3_AUX_IO do go from the different supplies, which are both LS2576S DC/DC converters. There is no special power rail sequencing in the board, main supply voltage just applies to all sources within the board (3 DC/DC converters). The ground is shared for all the supplies.

    LED_TERM_POWERGOOD is not a power rail, but a net name for a LED, which is on another sheet.
    Picture 2 is shown as example. Actually, I put the LED between VCC_3V3_MPSOC_IO (anode) and N-P-N transistor collector.

    Thank you!
    With regards,
    Maksim
  • Hi Maksim,

    Since Dylan is out on vacation for the next week, I'll be helping you out.

    It looks like you're trying to preset the level of the bus-hold circuit on the 74ALVCH16244 to "high" then allow it to be set by the bus-hold circuit from startup-onward.

    There is an application report that discusses this in detail located here (section 6.3): An Overview of Bus-Hold Circuit and the Applications

    It basically says that the only definitive way to ensure a 'high' startup voltage on a bus-hold circuit is to use a relatively low pull-up resistance (≤ 3kΩ), but this will also overpower the bus-hold circuit during normal operation -- ie any time the pin goes into 'high impedance mode' the output will go high rather than holding its previous state.

  • Hi, Emrys!

    Thank for answer! That AN is very nice and comprehensive note.

    I'll try to change the pullup resistor a bit later as I've modified the board already and it works, but I suppose your version it true.

    Thanks again!

    With regards, Maksim