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SN74AVC4T774: outputs enabled during power-up

JosefMieslinger
Intellectual 2170 points
Part Number: SN74AVC4T774
Other Parts Discussed in Thread: SN74AXC8T245

Dear Team,

we would like to use SN74AVC4T774 in our design and would like to tie the /OE to GND to enable the outputs.
1) Is there any concerns to stress the device if the outputs are enabled during power-up?
2) Will there be any glitches on the outputs if enabled during power-up?

Thanks!

-Joe

  • 0
    TI__Guru* 97046 points
    Hi Joe,
    I have asked our translation expert to take a look. He should get back with you today.
  • 0
    TI__Guru 61660 points

    Hi Joe,

    There is no concern tying the OE to gnd to always have the outputs enabled. Many of the schematics I have seen have the OE to gnd via a series resistor(1k-10k).

    The device guarantees Ioff partial power down protection, which enables to have Hi-Z when either one of the supply is power down(0V or gnd).

    The input circuitry of the device is always active, which means that the IO ports are recommended to be pulled down using weak pulldown resistors(50k-100k) to avoid any high current consumption from the device.

    Would you please let me know the 4 signals used here? Or if there is any interface being used like JTAG or SPI? What are the voltage levels used in translation?

    You could also consider using SN74AXC8T245 which have dual direction pins enabling translation of SPI / JTAG signals from 0.65 to 3.6V in addition to the other channels which could be used for translation.