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Original question:
Hi team,
my customer is using SN74LVC74A device. If they use PRE=H and CLR=H at first, what would the output be (Q0, ~Q0)? In other words, what would affect the Q0 state when power up every time? whether the Q0 state is same every time? Thanks a lot!
Best Regards
Zhengquan Lu
Hi Zhenquan,
The answer you're looking for can be found here:
[FAQ] What is the default output of a latched device? (Flip-Flop, latch, register) - Logic forum - Logic...
FAQ: Logic and Voltage Translation > Output Parameters >> Current FAQ
Flip-flops, latches, and registers do not have a default state on power up. The output is
Please let me know if I can be of further assistance.
