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SN74AVC4T245: Output Imepdance in the transition region

Dmitry Kovalenkov
Intellectual 1210 points
Part Number: SN74AVC4T245

Hi Team,

One of my customers is looking to use SN74AVC4T245 device in a level translation application. They have both 1OE and 2OE pins tied to ground with a 10k pull down resistor  so that the device is always enabled. They would like to know the output impedance value when devices transitions from the high - impedance state during power or power down. also, does it stay at this impedance or does it transition to the high impedance once the power state is stable? I looked around the forums but didn't' find anything that called out the impedance value or how to calculate it. In the DS it states that OE, needs to be tied to VCC through a pull-up resistor and must to be enable until VCCa or VCCb are fully ramped and stable - looks like this could cause output problems since the device is on during power up.

Regards,

Dmitry

  • 0
    TI__Guru* 97046 points
    Hi Dmitry,
    I have asked our translation expert to get back with you.

    In the meantime, typically input impedance is calculated with Ohm's law: R = V/I, with V = maximum input voltage, I = maximum input leakage.
  • 0
    TI__Guru 62280 points
    Dmitry,

    the output impedance when the output ports are not in High impedance can be caculated using the R = (Vcc-Voh)/IOH.
    For eg, for 3V @12mA case, the R is =( 3-2.3)/12mA = ~58ohm.
    Similarly for R for the NFET can be calculated using Vol/IOL.
    For eg : 0.7V/ 12mA = ~58ohm.

    Let me know if you need more information.

    Similarly, the input impedance can be calculated using the leakage into or out of the input ports. The input impedance will be very high for CMOS inputs.
  • 0 in reply to ShreyasRao
    TI__Intellectual 1210 points

    Hi Shreyas,

    Just a quick follow up question, would this be the correct way to model the output impedance? or would it be in series?

    Regards,

    Dmitry

  • 0 in reply to Dmitry Kovalenkov
    TI__Guru 62280 points
    Hi Dmitry,

    Yes, this would lead to worst case resistance values(across PVT), but ideally, since the Voh is usually closer to Vcc, the resistance is much smaller under nominal process at nominal room temp.
    For eg. if the Voh is ~2.9V instead of 2.3V for the 3Vcc case, then the R is 0.1/12mA =~ 8ohm.