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SN74AVC4T774: SN74AVC4T774 BUFFER LEVEL CONTROL ISSUE

Part Number: SN74AVC4T774

Hi Sir,

I used SN74AVC4T774 as below shows:

A connect to FPGA, B connect to output connector;

When initializing FPGA, I tested by multimeter, result is; A port  is low level, but B port  is high level; after when initialized done, A is low level, B is low level,

HELP: Why B port  is high level (when A is low) when initializing FPGA, can you help to check what's wrong with it?

 How can I modify the schematic? We need both A and B  low level just when during  initializing the FPGA.

Please help.

  • Cyan,

    During the Vcc supply at 0V, the IO channels are in Hi-Z. You can have the B ports tied using a weak pulldown resistors to ensure that the device has low during initialization. You can also have the A ports tied using the weak pulldown resistors for startup low level.