Hello,
I intend to try a rather unusual application for the buffer above: to use the supply pin as 3-state enable/disable. This is based in Ioff / partial power down capability, i.e. the output turns high-impedance when chip is not supplied.
What I would like to know is: do you have any internal data regarding the timing of this feature? More precisely, Ton and Toff (my proposed notations), which I would define as follows:
Ton = time interval from VCC rising monotonically, when it crosses the minimum rated supply (1.65V for this part) - until the output transitions from Ioff (leakage, high-Z) to operational, I propose until a load connected to mid-supply is pulled up or down above or below the nominal VOH / VOL.
Toff = similar, but when supply is falling, until output goes High-Z.
I intend to measure myself these numbers, just wanted to have professional opinion from your side.
My intended application is to modulate the buffer supply with a PWM signal (from a current-capable output), so that the output signals are also modulated with such PWM, and apply the outputs to low-pass 1st order RC filters, followed by Schmidt triggers. The resulting signals would be copies of the inputs, low-pass filtered with a variable corner frequency, variable determined by the duty cycle of the PWM supply. The same could be done also with 'LVC125 or 'LVC126 by applying PWM to the control input. I prefer this due to reduced size (I need 3 channels), and also I need Schmidt trigger on the inputs.
Thank you in advance.
