SN74LV595A: SER before SRCLK rising spec issue

Zoe Ko

Part Number: SN74LV595A

Hi team,

We are using 3pcs of the SN74LV595A as in below schematic(last picture) with series these three QH' to next stage SER.

You can see below first picture and we can know that first and third part should be no issue for SER before SRCLK rising spec as second picture waveform. While the second part will have SER before SRCLK rising spec issue since it's earlier half clock period and waveform is as third picture.

Do you have idea for series SN74LV595A or any solutions for it?

Or just need to care first stage timing spec and not care for second part timimg?

Thank you!

over 7 years ago

0 ShreyasRao over 7 years ago

TI__Guru 64480 points

Hey Zoe,

Dylan has been notified from our team and he will respond by today.

0 Dylan Hubbard over 7 years ago

TI__Mastermind 48405 points

Hi Zoe,

Thanks for including detailed waveform captures. Can you help me better clarify what the issue is here. I'm having trouble following what you are asking. I think you are asking about the set-up and hold times for the device, is that correct?

0 Emrys Maier over 7 years ago in reply to Dylan Hubbard

TI__Guru* 98297 points

Hi Zoe,
We haven't heard from you in a while. If you still need assistance, please post here -- or if you have found a solution, it would help others if you posted the solution.

I'm going to close this thread for now and mark it as "resolved."

Logic

Logic forum

SN74LV595A: SER before SRCLK rising spec issue