Hello,
I would like to ask why the Input Leakage Current (IIN) parameter is tested only on the DIR pin. As indicated in the device specification, both the DIR and OE are purely input pins. Thus, the IIN test should also be implemented on the OE pin.
I have also encountered the NEXPERIA 74LVC8T245-Q10, whose datasheet specified that the DIR and OE pins are tested for the IIN parameter.
Likewise, I would like to ask verification on my bench test methodology for the IIN test on SN74LVC8t245:
- VDDmax (5.5 V) is applied on both VCCA and VCCB
- ALL pins, except on the pin under test (PUT), are left open
- Force VCCA or GND on PUT, and measure current
- FAILS if measured current is outside the limits
Any input would be much appreciated. Thank you.
Regards,
Abe