SN74HC595: How to cascade two SN74HC595?

HI,

Thanks for the reply. By checked with customer, Their connection is just the same as your picture. also they put /OE low, and /SRCLR high.  the main issue is that there is a bit error: 

they input            :11010101 01010101, 

but the output is  :10101010 01010101   [ 1th 595: 01010101, the 2th 595: 10101010 ]

The first 595 output is OK. but the 2th 595 looks like a right shift happened.

The capture of logic analyzer is as below ,please kindly suggest if there is something wrong. 

Hi Alex,

I see a _lot_ of noise on the signals there (~2V pk-pk), which is a very likely cause of problems.

Can you provide a schematic and layout that we can review? 

Emrys,

(1) I'm asking  my customer for sch and pcb, but not get their response yet.

(2)is possible that the noise caused by the test method? below is another capture. basically , No obvious noise，but still miss bit. 

Hi Yue,

Errors in testing could lead to incorrect measurements, so its important that the test set up is clean and everything has a solid connection. As for the scope shot, could you label the signals so i know what i'm looking at and also possible separate the signals so its easier to see. 

I would advise providing a scope shot of the first 595 probing the SRCLK, RCLK, SER, and QH' pins. The same pins can be measured for the second 595 but instead of QH' the QA pin can be probed. Make sure to clear both shift registers before inputting the data.

Hi,

Thanks for your all reply. I will close this thread. My customer removed this function.