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TXB0108: Direction control, A/B side condition

Part Number: TXB0108
Other Parts Discussed in Thread: TXS0108E

Hello team,

I have a +3.3V FPGA connected to a +5.5V 75ALS160DW via the TXB0108, the interface signals being the 8-bit GPIB data bus.

I don't have any pullup/pulldown resistors on the either side of the TXB0108, and trace lengths will be short (low-capacitance).

The data rate will be relatively slow, but the FPGA and 75ALS160 may experience a condition where they are changing from driver to receiver, or vice versa, for a short period of time (controlled by software) where either both drivers may try to drive the A and B side to different levels at the same time, or both sides may temporarily "float" during this transition period (the "bus turn-around" period). The TXB0108 must be able to recover from this and not latch up or something like that.

Do you think TXB0108 is right part for the use case?

Best regards,

  • The TXB can handle both sides being driven to different voltages (nothing happens), or both sides being open (the last value holds). However, the TXB's outputs are not designed to be able to sink more than 20 µA; ALS inputs might require more than that to be pulled low.

    I would recommend the TXS0108E instead. (If both sides are driven to different levels, they are connected through the switch with about 300 Ω; the resulting current should be small enough.)

  • Hello Clemens-san,

    Thanks for your support.

    1.  My "A" side for this part is +1.8V, and the "B" side is +5V.I looked at the TXS0108E data sheet, and it looks like it also is limited to 20ua drive on both sides.  In fact, it is not spec'd for VOHB with VCCA = 1.8V.  VOLB is also not spec'd at VCCB = 5V.  But it does look like the IOL will be at least 620ua.

    2.  The VOH(min) of the 74ALS160 is 2.7V(min), 3.5V(typ).  This drives the TXS0108E on the B side.  The B side VIH(min) of the TXS0108E is 4.6V(min).  I don't see how this will work; 4.6V is a very high VIH level.  Even for the TXB0108 the VIH(min) would be 3.25V.

    I’m still not sure if either part will work for my application. Could you please give any comments on this?

    Best regards,

  • The TXS uses passive switches and has no drive strength. High signals are generated by its internal 4 kΩ pull-up resistors; low signals are generated by whatever device drives the line low on the other side, i.e., low signals depend on the drive strength of the FPGA or the ALS.

    The TXS VIH does not really matter; if no external device is actively driving the line low, the internal pull-up resistors will ensure that the voltage is high.

    The TXS is compatible with both 1.8 V CMOS and 5 V TTL/ALS I/Os.