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TXB0304: Intel Gemini Lake + TXB0304

Part Number: TXB0304
Other Parts Discussed in Thread: TXS0104E, TXB0104

My Dear customer would like to use the TXB0304, and play as a level shifter at Intel Gemini Lake with LPC ( Low Pin Count ) Interface.

Two questions here that need your quick to reply.

Q1.  Can TXB0304 device be operated as Open Drain at 25Mhz output at Intel's LPC during below TAR phase?? 

  1. 1.      LPC TAR phase requirement:

This field is two clocks wide, and is driven by the host when it is turning control over to the
peripheral, (for example, to read data), and is driven by the peripheral when it is turning control
back over to the host.
On the first clock of this two clock wide field, the host or peripheral drives the LAD[3:0] lines to
‘1111b’. On the second clock of this field, the host or peripheral tri-states the LAD[3:0] lines.
Since these lines have weak pull-ups on them, they will remain at a logical high state.

Q2: Do we need to use pull up resistor at output side for LPC?  IF yes, may I know its value.

  • Section 9.1 of the datasheet says:

    It can only translate push-pull CMOS logic outputs. If for open-drain signal translation, please refer to TI TXS010X products. Any external pull-down or pull-up resistors are recommended larger than 20 kΩ.

    What pull-up resistors does LPC use?

  • Hello,

    As Clemens mentioned, something in the TXS family like the TXS0104E should be able to solve your problem if you want to use it for an open drain signal. The TXS family however has 10k internal pullups so you wouldn't need external pullups for this device unless you want to reduce the pull up resistor value.

    Thanks!

    -Karan

  • Thanks Clemens and Karan quick reply.

    May I paste Customer requirements again for its Input / output

    Q1: Per Intel’s LPC interface protocol, it is needs to confirm with you again.

            During TAR (Turn-Around ) customer would like to see TI TXS ( or TXB ) device output waveform being pulled at high state.

            Would you please confirm this point again deeply appreciate.   

                      Intel LPC doc:  (Turn-Around: The last component driving LAD[3:0] will drive it high during the first clock, and tri-state during the second clock.)

    Q2: There are three devices listed below, you purposed the TXS0101x and TXS0104E and we found another one TXB0104.

           May you please review again which one is suitable for customer application?

  • Hello,

    Q1:

    Only the TXS family should be used for open drain applications. The TXS has internal pullup resistors which will cause the device to be in a natural high state.
    Here is the guide on using TXS family translator: http://www.ti.com/lit/an/scea044/scea044.pdf
    Here is what happens when you try to have external pullsups on TXB translators: http://www.ti.com/lit/an/scea054a/scea054a.pdf
    I don't know what TAR is but when the TXS device is left floating due to its internal pullups, it will automatically go high.

    Q2:

    Here is the difference in the families:
    https://e2e.ti.com/support/logic/f/151/t/719537?tisearch=e2e-sitesearch&keymatch=faq%3Atrue

    Clemens mentioned TXS010X which is same thing as TXS0104. Don't use TXB0104 for open drain signals.

    Thanks!

    -Karan