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SN74AVCH1T45: SN74AVCH1T45 unexpected pulse at A port output when power up AVCC

Part Number: SN74AVCH1T45
Other Parts Discussed in Thread: SN74AXC1T45, SN74AXCH1T45

Hi, team,

My customer is using SN74AVCH1T45, schematic as below.

But they noticed that there was unexpected pulse at A port output at the time when AVCC 3.3V is applied, quite different from what was sourced to port B.

Below two waveforms, the first one is AVCC and port B, the second one is AVCC and port A.

Can you explain the reason behind the abnormity? and how to avoid it. Thanks!

  • This might not be related, but the datasheet says:

    Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

  • Hi Nicole,

    Would the bus-hold feature required in the application? if not, please consider using non-bus hold device like the SN74AXC1T45.

    Else consider using the SN74AXCH1T45. Both the device are guaranteed for no glitch performance for any direction and Vcc supply voltages.

    Use of external pulldown or pullup resistors on the A/B lines are not recommended on the bushold devices.

    If non-bushold devices are used, please have A/B nodes at zero with very weak pulldown during supply ramp up/down to hold the lines are known states.

  • Hi, Shreyas,

    Below is their power sequence, you can see 3.3V VCCA power up before 1.8V VCCB.

  • Hi Nicole,

    Please refer to the FAQ about the power sequencing requirements.

    Would the customer consider the SN74AXCH1T45 which is P2P with the SN74AVCH1T45 and doesn't have any power sequencing concerns?