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Original question:

SN74AVCH20T245: SSO or Crosstalk issues with VFBGA package?

SN74AUC32244: Signal Integrity of clock signal at 156.25 MHz

Christopher Gardner
Prodigy 60 points

Part Number: SN74AUC32244

I am trying to simulate the signal integrity of an SN74AUC32244 output driving a transmission line to another SN74AUC32244 input.  The transmission line is about 53 ohms and 3 inches long.  I am simulating using the IBIS models from TI and with Hyperlynx VX2.5.  I can't seem to find any viable solution using either:

  1. no termination
  2. source series termination (43.2 ohm)
  3. load parallel termination (150 || 150)
  4. source series + load parallel termination (43.2 + 150 || 150)

The component values are examples from simulation, but I have tried many different values and combinations.

I was under the impression that this part was capable of driving a 156.25 MHz clock.  Am I mistaken?

  • 0
    TI__Guru 59350 points

    Hi Chris,

    Do you have actual scopeshots from the bench or is this only on simulation? Do you have any more information on the output loading?

    This device family is designed to support high speed with low prop delay. however, as you know the tpd linearly increases with the output cap loading.

    Is the issue not reaching 156Mhz or is it signal integrity issue with overshoots ringing?

  • 0 in reply to ShreyasRao
    Prodigy 60 points

    This is simulation only.  No results yet from the bench.  The issue is with overshoot/ringing, but specifically not being able to find any termination solution that makes the link work.  Typically some mix of series/parallel termination will get a high speed IC to look nice in simulation.

    Here is the simulation schematic.  The load cap is another AUC input pin model.

    Simulation cases:

    1. no termination

    2. source series termination (43.2 ohm)

    3. load parallel termination (150 || 150)

    4. source series + load parallel termination (43.2 + 150 || 150)

  • 0 in reply to Christopher Gardner
    TI__Guru 59350 points

    Hi Chris,

    I will request Karan to take a look into this..

    The IBIS models were generated quite a few years back and it may not ( or it may) reflect the true physical behavior of the device.

  • 0 in reply to ShreyasRao
    TI__Genius 16735 points

    Hi Chris,

    I also ran this simulation and saw the similar ringing. It might just be the model is not build correctly. My recommendation would to be order the part and test it on a bench. This device features a staged output to avoid overshoot and allow fast rising edges. I don't know if the model is able to understand that. I don't know however what the output of this device looks like with a transmission line and at a high frequency so I would be interested to see your results if you test it on the bench.

    Thanks!

    -Karan

  • 0 in reply to Karan Kotadia
    Prodigy 60 points

    Thanks Karan.

    Are there any eval boards with these parts that could be used to test on the bench?  I ran a quick search but didn't see any-- not sure if I'm looking in the right place.

  • 0 in reply to Christopher Gardner
    TI__Genius 16735 points

    Hi,

    There are no eval boards for this package. You might have to design your own board to test the device or buy some adapter and do it.

    Thanks!

    -Karan