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SN74HC02: Issue leakage or noise?

William Tai
Prodigy 50 points
Part Number: SN74HC02
Other Parts Discussed in Thread: SN74LVC1G97,

Hey TI experts, 

I'm a bit unsure as to what the exact issue is or if I don't fully understand how the part is supposed to work. But as an overview when I input two identical SENT signals through the logic gates, when I swap between the signals passing through they become modified. I suspect that it is simply noise, but moreso, one of the signals becomes modified beyond usability. This same problem also occurs with two different SENT signals. My best guess and understanding is that the signals are affecting one another, but I'm looking for a way to prevent this or mitigate it somehow so that the modifications are tiny. I also have an issue when connecting the logic gate to a 5V input, it bumps up the amplitude of the signals pretty significantly as well (like 3-4V). My questions would be, is this suppose to occur? Is there a way to reduce the noise? And is the logic gates suppose to impact the SENT signal in any capacity or is it some issue in terms of the wiring. Thanks for your help!

  • 0
    Guru 316690 points

    Please show the schematic of the circuit, and describe the electrical characteristics of the signals.

  • 0 in reply to Clemens Ladisch
    TI__Genius 16735 points

    Hello,

    Do you think you can provide scope shots of your signals. I don't understand what is meant by SENT signals. Can you also provide maybe what the output waveform was and what you expected it to be?

    Thanks!

    -Karan

  • 0 in reply to Clemens Ladisch
    Prodigy 50 points

    This is the basic circuit above, there are other components, such as that send out the SENT signal but those don't affect the logic gate in anyway. The SENT signals basically fire out high and low signals in specific time intervals that can later be interpreted by the device. However, my problem occurs that one of the signals, say SENT signal 1 passes through just fine, however SENT signal 2 which if sent independently is fine, but through the logic gate becomes modified beyond recognition from the device. Apologies for the vagueness unfortunately due to the nature of my work I cannot be to specific about some components, but I'll try to provide as much information as I can. Thanks for your reply!

  • 0 in reply to Clemens Ladisch
    Prodigy 50 points

    This is the basic circuit above, there are other components, such as that send out the SENT signal but those don't affect the logic gate in anyway. The SENT signals basically fire out high and low signals in specific time intervals that can later be interpreted by the device. However, my problem occurs that one of the signals, say SENT signal 1 passes through just fine, however SENT signal 2 which if sent independently is fine, but through the logic gate becomes modified beyond recognition from the device. Apologies for the vagueness unfortunately due to the nature of my work I cannot be to specific about some components, but I'll try to provide as much information as I can. Thanks for your reply!

  • 0 in reply to Karan Kotadia
    Prodigy 50 points

    Okay hopefully these images help. The very first one is what a SENT signal looks like, basically high and low signals sent at specific time intervals such that it relates to a specific value so a device that receives it can interpret it. The last image is what the schematic it. So the second image is what my biggest issue. The point of the circuit is to swap between two signals, signals coming from 2 and 5. As a test I sent a SENT signal to 2, and no signal to 5, which should mean that swapping between them, done by sending a high or low signal to 11,12, and 3 simultaneously based on the NOR gates, should render a SENT signal coming out of the output or no signal, as there is no signal sent to 5. However, when I swap 5, what occurs is shown in the second pic. This is why I believe it may not be simply a noise issue, but rather a interference issue because this looks like a partially broken up top half of a SENT signal. And this is what is "interfering" with the other SENT signal that should be inputted in 5. Hopefully this clears things up unfortunately I cannot be to specific about some of the components but I'll provide as much as I can and let me know if I need to clear anything up. Thanks for your help!

  • 0 in reply to William Tai
    Guru 316690 points

    3.4 V sounds like a TTL voltage. Are you really using a HC family device?

    What is the power supply? Is there a decoupling capacitor?

    What are the characteristics of the SENT signals? What voltages? Are both levels actively driven, or generated with pull-up/-down resistors, or open? Are there any other loads connected to any inputs or outputs?

    (And you could replace these four gates with a single SN74LVC1G97.)

  • 0 in reply to Clemens Ladisch
    Prodigy 50 points

    The power supply is 5V, but no I don't have a decoupling capacitor. Would that just be put between between the Vin of the SN74HC02 and the power supply. The voltages of the SENT signals lie between 5 and 0, but after going through the logic gate go between -1 and 4 but don't seem to affect the translation of the signal. There are pull down resistors that are used and there are no other loads connected to the input or the output. I like the idea of the SN74LVC1G97 I'll check that out. Thank you so much for your help!