TXB0104: Need to know clock quality

What exactly do you mean with "quality"? If the original signal has proper digital voltage levels, the TXB will not introduce additional pulse width distrortion.

The TXB has weak output drivers, so you will not be able to drive long traces or other large loads.

In the design, FPGA Generates 16MHz clock required for CAN controller (SJA1000).

Since FPGA is working on 1.8V level we need level shifting to 5V through TXB0104.

The length may go up to 2 inches max. By quality what I meant is if any distortion will occur on the clock edges.

This should work.

But why are you using an auto-bidirectional translator for a unidirectional signal? A unidirectional translator like the SN74LVC1T45 would have proper input/output buffers. Are there other signals?

Yes there are 2 more signals , TX and RX signals are connected.