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SN74LVC1T45-Q1: Bidirectional translator

Part Number: SN74LVC1T45-Q1
Other Parts Discussed in Thread: SN74AXC4T774, SN74LVC1T45

Hi, 

As shown in the datasheet of SN74LVC1T45-Q1.

"In a bidirectional application, these enable times provide the maximum delay from the time the DIR bit is switched until an output is expected. For example, if the SN74LVC1T45-Q1 initially is transmitting from A to B, then the DIR bit is switched; the B port of the device must be disabled before presenting it with an input. After the B port has been disabled, an input signal applied to it appears on the corresponding A port after the specified propagation delay."

As we can see, there is no ENABLE pin of SN74LVC1T45-Q1.

What you means the B port of the device must be disabled before presenting it with an input? How can you disable the port?

Is it the same as SN74AXC4T774, make sure the B port is no signal or floating during the direction change period?

  • "The B port of the device must be disabled before presenting it with an input" means that the first event has to happen before the second one. In other words, it is forbidden for your circuit to drive a voltage on the B side while the B output driver is still active. In other words, you have to wait until the output drivers have been disabled before your other device actives its own outputs.

  • As you said" I have to wait until the output drivers have been disabled".

    1.My question is how can I disable this device? SN74LVC1T45-Q1?

    In the datasheet, ENABLE times calculation. So, DIR pin is used to change direction and it will also disable the device during this direction change period?

    2. "it is forbidden for your circuit to drive a voltage on the B side while the B output driver is still active"

    I think this is called BUS contention. It is possible to drive B port at different voltage level. Then, we need to add a 33ohm series resistor and calculate the power dissipation. 

    3. What's the difference between SN74LVC1T45-Q1 and SN74LVC1T45?

  • 1. The DIR pin disables the output drivers on one side, and enables them on the other side. The tP*Z specifications tell you how long this takes.

    2. You need to protect against bus contention only if it actually happens. How are you controlling the DIR signal, and when do other devices on the bus drive it?

    3. "-Q1" means AEC-Q100 qualification.

  • Hi,

    Thanks for your reply.

    The other devices can drive the B port all the time. And the software may set the FPGA to control DIR also drive B port. 

    This can happen during the software development. 

    To protect the device when bus contention happens, I will add a 33ohm resistor. That will limit the maximum power dissipated on the device.