Hi Team,
I have a question regarding LSF0101DRYR
In datasheet front page is indicated that Va<-->Vb 1.2V<-->1.8V is a possible config:
Allows bidirectional voltage-level translation between
– 0.95 V ↔ 1.8/2.5/3.3/5 V
– 1.2 V ↔ 1.8/2.5/3.3/5 V
– 1.8 V ↔ 2.5/3.3/5 V
– 2.5 V ↔ 3.3/5 V
– 3.3 V ↔ 5 V
But on page 13 is indicated:
Also Vref_B and VI(EN) are recommended to be 1.0 V higher than Vref_A for best signal integrity.
Our customer wants to use this device in the following conditions:
FPGA VB 1.8V +/-5%
PHY VA 1.2V +/-5%
Freq. MDIO CLK 10MHz
In this case Vb is not > 1V compared to VA
Therefore:
- In the condition indicated above, with Fclk_mdio = 10MHz is guaranteed the operation?
- In case it is not working properly, could you indicate another device to translate 1.2V<-->1.8V?
Regards,
F.