SN74LVC16T245: Fanout Buffer

Max Pom

Intellectual 350 points

Part Number: SN74LVC16T245

Hello,

My goal is to split one LVCMOS to 4x LVCMOS (or more). The data rate is 100Mbps.

One quad device (4 inputs x 16 outputs) is preferred.

Is there any recommended device?

Is it correct to use a regular (level shift) buffer, like the SN74LVC16T245, by shorting 4 inputs to get 4 splitted outputs (to different loads)?

I assume that dividing the input resistance by 4 can limit VIH/VIL, and multiplying the input capacitance by 4 can limit the data rate?

If it's a good approach, can you tell what is the maximum data rate? Can I short more than 4 inputs, lets say all the inputs, to get 16 splitted outputs?

Thanks!

Max

over 5 years ago

0 Clemens Ladisch over 5 years ago

Guru 317000 points

Do you actually need level shifting? What voltage(s)?

Do you have one input or four inputs? What is the drive strength of the original signal?

In general, CMOS input impedance is so high that you can ignore it, and input capacitance is so low (about 3.5 pF) that you can drive many inputs without problems.

0 Dylan Hubbard over 5 years ago in reply to Clemens Ladisch

TI__Mastermind 45855 points

Hi Max,

I have an additional question on top of what Clemens has asked. What supply voltage are you planning on using?

0 Dylan Hubbard over 5 years ago in reply to Dylan Hubbard

TI__Mastermind 45855 points

Hi Max,

It's been a while since your last post. I assume the issue has been resolved, if not please feel free to reply to this thread and I'll be happy to continue supporting.

Logic

Logic forum

SN74LVC16T245: Fanout Buffer