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buffer recommendation

Zhihong Huang
Intellectual 1550 points
Other Parts Discussed in Thread: TXB0102

Hi team

My client wants to realize two-way signal level conversion through one buffer or two buffers:

1. First signal: Vin 3.3V conversing to Vout 5V.

    second signal: Vin 5V conversing to Vout 3.3V.

2. The maximum frequency of two signals can be 20 m, so the customer is worried that two high-frequency signals in the same buffer will cause EMC problems and interference.Do we have the design or model of buffer for high frequency signal and EMC interference like this?

3. I haven't found  the GPN of buffer which is open-drain output with  Schmitt-Trigger, could you please help me double-check that?

Best Regards,

Wesley Huang

 Email: wesley-huang@ti.com

  • 0
    TI__Genius 16735 points

    Hello Wesley,

    We do not have a open-drain buffer with schmitt triggers. Do you require a buffer that is open drain to do this translation?

    Can you tell me what frequency you require. There is a typo so I cannot tell what 20 m means.

    I can recommend the TXB0102 for the translation voltages and number of channels you are asking. But be wary that this device does not have output drive strength and so should only be used for high impedance devices with short trace lengths.

    We also have the TXS and LSF devices which are more for open drain translation.

    Thanks!

    -Karan

  • 0 in reply to Karan Kotadia
    TI__Intellectual 1550 points

    Hi Karan

    Thanks for your good recommendation, I have two question for you：

    1. could you please explain more specifically about "does not have output drive strength"? maybe you can explain through a example about connecting to a devices whose impedance is low.

    2. what could be the risk of this device under the application of  two signal conversion? because my customer worry that If they put two high frequency signal(20M) together, there will be EMC issue and crosstalk.

    Best Regards,

    Wesley Huang

     Email: wesley-huang@ti.com

  • 0 in reply to Zhihong Huang
    Guru 318740 points

    The datasheet says:

    8.3.3 Output Load Considerations

    TI recommends careful printed-circuit board (PCB) layout practices with short PCB trace lengths to avoid excessive capacitive loading and to assure that proper O.S. triggering takes place. PCB signal trace-lengths must be kept short enough such that the round trip delay of any reflection is less than the one-shot duration. This improves signal integrity by assuring that any reflection sees a low impedance at the driver. The O.S. circuits have been designed to stay on for approximately 10 ns. The maximum capacitance of the lumped load that is driven also depends directly on the one-shot duration. With heavy capacitive loads, the one-shot can time-out before the signal is driven fully to the positive rail. The O.S. duration has been set to best optimize trade-offs between dynamic ICC, load driving capability, and maximum bit-rate considerations. Both PCB trace length and connectors add to the capacitance that the TXB0102 output sees, so TI recommends that this lumped-load capacitance be considered to avoid O.S. retriggering, bus contention, output signal oscillations, or other adverse system-level affects.

    8.3.5 Pullup or Pulldown Resistors on I/O Lines

    The TXB0102 is designed to drive capacitive loads of up to 70 pF. The output drivers of the TXB0102 have low DC drive strength. If pullup or pulldown resistors are connected externally to the data I/Os, their values must be kept higher than 50 kΩ to assure that they do not contend with the output drivers of the TXB0102.