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SN74LVC1G17: Is this buffer adequate for CSYNC signals?

user6245458
Prodigy 30 points
Part Number: SN74LVC1G17
Other Parts Discussed in Thread: SN74AHCT1G125

Hello. I want to use a Schmitt trigger to buffer a CSYNC signal that may be CMOS level or TTL level. I plan to connect the CSYNC signal to the input of this IC and then use a voltage divider after the output to have a Vpp of ~350mV when connecting it to a SCART device.

Is this integrated circuit a good choice or do you recommend me other option?

Thank you in advance.

  • 0
    Guru 316690 points

    LVC inputs are overvoltage tolerant, so with VCC = 3.3 V, the SN74LVC1G17 will accept both CMOS and TTL.

    The LVC output impedance is less than 25 Ω, so it is possible to design a voltage divider with a source impedance of 75 Ω.

  • 0 in reply to Clemens Ladisch
    Prodigy 30 points

    That's fantastic. Thank you so much.

    The power supply will be +5V so I plan to use a voltage divider consisting in a 470R and 75R to attenuate CSYNC to ~350mV and connect it to the SCART receiver in DC coupled mode. Does that sound OK?

  • 0 in reply to user6245458
    Guru 316690 points

    470 Ω + 75 Ω does not result in 350 mV Vpp.

    With a 5 V power supply, the LVC input will not accept TTL signals. You must use a device that is designed to have a TTL-compatible input, such as the SN74AHCT1G125.

    The output impedance of a voltage divider is the equivalent of the two resistors in parallel. So assuming 1 % resistors, and adjusting for the typical output impedance of 25 Ω of the AHC device, you should use R1 = 1020 Ω, R2 = 80.6 Ω for 350 mV, or R1 = 511 Ω, R2 = 87.6 Ω for 700 mV.

  • 0 in reply to Clemens Ladisch
    Prodigy 30 points

    Thank you, that's very clarifying information. So the SN74AHCT1G125 will accept both CMOS and TTL inputs powered with 5 V, behaving as a Schmitt-trigger?

    What I want to do is buffer CSYNC signal that may be CMOS or TTL (and probably noisy) in a + 5V powered circuit to obtain a ~350mV buffered and clean signal.