This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

CD74HC40105: Input on CD74HC40105E

Part Number: CD74HC40105

Hello,

I have a customer asking about this part number CD74HC40105E

When you set pin 1, the three-state control, to HIGH, does that immediately halt data input?

Do the inputs SI an SO need to be exactly opposite of each other?

Are you able to help us answer their questions on this part?

Thank you,

  • Hi Robert,

    1. HIGH on the three-state control flag (outputenable input OE) forces the outputs into the high-impedance OFF-state mode. I am not sure what you mean by halt data input, but the only thing the OE pin will do is put your outputs in high impedance.

    2. No, the SI and SO pin do not need to be exactly opposite of each other. There is timing diagram in the datasheet that can be reviewed to see an example transition occur.

    Data can be entered whenever the DATA-IN READY (DIR)flag is high, by a low to high transition on the SHIFT-IN (SI)input.

    As soon as the first word has rippled to the output, the data-out ready output (DOR) goes HIGH and data of the first wordis available on the outputs. Data of other words can be removed by a negative-going transition on the shift-out input(SO).

    Thanks!

    -Karan