we are using SN74LVC1G74 as shown above with this connection.The input to preset i.e..,IMD ERROR SIG1 is 24V,using potential divider circuit it is converted to 3.3V and we are taking output from Q'. It is working properly, like whenever error signal becomes low it makes the IMD putput low and it remain latched a long as it is not cleared . But problem is that when we again switch ON the power, it no longer remain latched it isalways needs to be cleared all the time, like if it was not in error state and you switch ON power now it is always found to be in error state and has to be cleared again.
what could be the possible reason?
