SN74LV4T125: Design confirmation for four lines 5V -> 3.3V and two 3.3V -> 5V

Jonathan Geronga

Part Number: SN74LV4T125
Other Parts Discussed in Thread: SN74AHCT125, SN74AHC125

Hi Team,

We have a customer that has the intended design with SN74LV4T125 in the image below.

The customer would like to confirm the following if this would work:

1. Enable the two SN74LV4T125 with one of 5V MCU's GPIO pins.
2. Add pull-up resistors to the enable pins so they are by default disabled, and pull them low in firmware once I want to enable the bus.
Will this work? Especially for the down-translation where Vcc is 3.3V?

Ideally, the customer would like to tie all eight enable pins together, but if need be, He has enough GPIO pins left to enable the up-translator and the down-translator separately.

Please let me know if you have any questions with the customer.

Thanks!

Joanthan

over 4 years ago

0 Clemens Ladisch over 4 years ago

Guru 276420 points

All inputs are overvoltage tolerant, so the pull-ups can go to 5 V.

All OEs can be driven by the same signal.

For these voltages, the SN74AHC125 (for translating down) and SN74AHCT125 (for translating up) would be cheaper alternatives.

0 Jonathan Geronga over 4 years ago in reply to Clemens Ladisch

TI__Expert 7930 points

Hi Clemens,

Thank you for the support and this great information.
The customer is satisfied with the given information.

Have a great day!

Regards,

Jonathan

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SN74LV4T125: Design confirmation for four lines 5V -> 3.3V and two 3.3V -> 5V