CD4093B Spec Definition

Paul Joseph

Other Parts Discussed in Thread: CD4093B

CD4093B data sheet. I need to clarify the notes on page 2 of the datasheet please.

Is an “a” situation for one input to a gate High and the other in transition from low to high for the positive trigger threshold specification?

And is the “b” situation where both inputs to the gate are transitioning (tied together?) from low to high for the positive trigger threshold specification??

over 14 years ago

0 Paul Joseph over 14 years ago

Expert 2795 points

any response on this? Please advise asap.

0 Chris Cockrill over 14 years ago in reply to Paul Joseph

TI__Mastermind 46480 points

The plots show the same thing. They show 1 input and output transistioning up and then back down. They are just shown in different types of plots.

Here is the important thing to remember on a schmitt trigger. Your input should go above VP max and below VN min to insure you get a transition on the output.

0 Paul Joseph over 14 years ago in reply to Chris Cockrill

Expert 2795 points

From the customer, please let me know:

I don’t think we have a clear communication here. I am not asking about any plots. Basically, I need an expanded definition in words of what the difference is between the two cases used to specify, e.g., Vp min, which are referenced in the spec under conditions and are defined at the bottom of page 2 of the datasheet for CD4093B Types. One is referred to in note “a” and the other case is referred to as note “b”. I have an idea what is meant but I need to make sure I am correct.

0 Chris Cockrill over 14 years ago in reply to Paul Joseph

TI__Mastermind 46480 points

Sorry about that. I was looking at a and b on page 1 .

For the notes on page 2

(a) they are switching 1 input per gate while holding the other at 5V.

(b) They are switching both inputs on the gate at the same time.

0 user1430558 over 10 years ago in reply to Chris Cockrill

Prodigy 50 points

Hi,
I use CD4093B. The same signal "RESET" (capacitor charge at power ON) arrive on the inputs of two input gates

Is the same positive Trigger Threshold Voltage for all the gate in a package ?

Is both output on the gate switching at the same time when both inputs are switching on the gate at the same time ?

Thanks for your response

0 James Lockridge19 over 10 years ago in reply to user1430558

TI__Genius 14487 points

Please see my response on your other post:

https://e2e.ti.com/support/logic/f/151/t/436449

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CD4093B Spec Definition