I would like to translate 5V TTL signals to LVCMOS Inputs of the Xilinx (FPGA)VC707 board SMA inputs .which Texas IC should I use..?
and how to do the connections for the same
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I would like to translate 5V TTL signals to LVCMOS Inputs of the Xilinx (FPGA)VC707 board SMA inputs .which Texas IC should I use..?
and how to do the connections for the same
To translate from a higher to a lower voltage, you can use any buffer with overvoltage-tolerant inputs while using the lower voltage as VCC.
Hello, and welcome to the forums!
Can you share details regarding your system?
First, I'm assuming this is a unidirectional signal (ie the input is always an input, and the output is always an output). If this is not the case, please let me know.
For the input signal:
* By "5V TTL" do you mean an _actual_ TTL signal (ie VOL = 0.4V and VOH = 2.4V), or do you mean a typical 5V CMOS output? This is a very common point of confusion.
* What is the minimum pulse width (or data rate/operating frequency) for the input signal?
For the output signal:
* What LVCMOS voltage node are you operating at? We see everything from 0.7V to 3.3V referred to in this manner.
* What is the load connected to the ouput side of the device. You mentioned a Xilinx FPGA, but I assume there are also traces, possibly connectors, transmission lines, filters, etc.
With the above info we should be able to make a reasonable recommendation.
By "5V TTL" do you mean an _actual_ TTL signal (ie VOL = 0.4V and VOH = 2.4V), or do you mean a typical 5V CMOS output? This is a very common point of confusion
I mean its an actual unidirectional TTL signal with pulse widths of 20 ns to 20ns and frequency of the order of KHz
For the output signal:
* What LVCMOS voltage node are you operating at? We see everything from 0.7V to 3.3V referred to in this manner.
Iam intending to use the output of the translator to the SMA inputs of the Xilinx FPGA (VC707) so its LVCMOS1.8V standard
* What is the load connected to the ouput side of the device. You mentioned a Xilinx FPGA, but I assume there are also traces, possibly connectors, transmission lines, filters, etc.
I dont get you but plan to conect to the inputs of the Xilinx FPGA VC7070 vis short cable to the SMA conectors on the VC707 xilinx board
With the above info we should be able to make a reasonable recommendation.
Hi Mandakini,
Thanks for the added information.
With pulse widths of 20ns, your actual operating bit rate is 1/20ns = 50 Mbps -- even if you only get one 20ns pulse every second, it's still a 50 Mbps data rate since the device must respond in just a few nanoseconds.
So, from the provided info, TTL 5V input to 1.8V LVCMOS output at 50 Mbps, I would recommend to use the SN74LVC1G34 with a supply voltage of 1.8V.
This device supports 5V inputs at any supply value, and only requires VIL < 0.63V at 1.8V supply, which should align with the TTL input signal.