This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

SN74LV1T126: Logic Level for OE pin

Part Number: SN74LV1T126

For this part, can we connect pin A to 5V, Vcc to 5V, but drive the OE pin with 3.3V compatible logic?

We are planning to drive OE pin from 3.3V bank of FPGA.

Output pin we will connect it to 5V logic circuit.

 

Please check and let us know whether it is fine to connect that way.

  • TI team,

    Kindly note that this query is very very urgent, as I have a fabout by next week.

  • Hi Prasenjit,

    Yes - the device can have a 5V supply and 3.3V input or 5V input -- or any combination of those. This is the primary purpose of the LV1T family of logic and is defined in the datasheet pretty clearly.

    In the Recommended Operating Conditions, the input voltage is independent of the supply value:

    In the Electrical Characteristics, the input must be above 2.03V to be considered "high" and below 0.8V to be considered "low" with a supply of 5V: