SN74LVC1T45: 3.3V ⇒3.3V Output Error

Zeming Kong

Part Number: SN74LVC1T45

Hi there,

My customer is evaluating SN74LVC1T45. It is used as a bidirectional buffer for SPI data transfer between CPU and FPGA. The schematic is like below.

He noticed that when it worked as A ⇒ B, the output voltage of B sometimes became smaller than 3.3V. The waveforms is below.

Could you tell me why this happened and how to solve this?

The customer is wondering if it was because of the mismatch of A and B pull-down resistors.

Regards,

Zeming

0 Zeming Kong over 5 years ago

Sorry, I am afraid that the figures are not valid. Please check the figures below.

0 Clemens Ladisch over 5 years ago in reply to Zeming Kong

Guru 325980 points

This typically happens during bus contention. Apparently, the FPGA is actively driving the line low.

0 Zeming Kong over 5 years ago in reply to Clemens Ladisch

Hi,

Thanks a lot for your reply.

The customer checked his circuit, and didn't find bus contention in this rail.

And he ensured at least 2us time margin for the direction switching, so bus contention may not be the problem.

Is there any other reason?

Regards,

Zeming

0 Clemens Ladisch over 5 years ago in reply to Zeming Kong

Guru 325980 points

What is the first channel?

0 Zeming Kong over 5 years ago in reply to Clemens Ladisch

Hi,

Sorry, I don't know what it is. The customer only told me 2ch was A, and 4ch was B.

Do you need other information?

Regards,

Zeming

0 Clemens Ladisch over 5 years ago in reply to Zeming Kong

Guru 325980 points

The problem happens when the yellow signal is high. I cannot do more without more information.

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