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SN74LVC1G07: rc slow signal at input of buffer SN74LVC1G07

Part Number: SN74LVC1G07
Other Parts Discussed in Thread: SN74HCS09


I am designing this circuit that generate a pulse when the output of AND is low (I add a picure). I am wondering if a problem could be putting a RC slow ramp at input of buffer, because in datasheet there is a data “Input transition rise or fall rate MAX 5ns/V @ 5V”.

Thanks in advance and best regards.

  • Hey Diego,

    The LVC1G07 has a standard CMOS input, so the slow input can cause shoot-through current and oscillation as it would with any device. This can reduce reliablity and possibly cause issues with false outputs.

    One option would be the SN74HCS09 which has Schmitt-trigger inputs and open-drain outputs, so it can support slow inputs, and you could use one of those to replace both devices shown -- just short two inputs together to get a 'buffer' from an AND gate.  If you don't need the other two channels, you can just connect the inputs to ground.