• State TI Thinks Resolved
  • Locked Locked
  • Replies 4 replies
  • Answers 1 answer
  • Subscribers 21 subscribers
  • Views 1604 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TXS0102: TXS0102 output is not stable during high level

Wayne Wang20
Expert 4380 points
Part Number: TXS0102
Other Parts Discussed in Thread: SN74LVC2T45, SN74LVC2G17

Hi team,

My customer is testing TXS0102. The schematic is as below. B1 B2 are input pins and they are from a 5V MCU. A1 A2 are output pins to a 3.3V MCU. And B2—>A2 is a clk signal of the SPI interface, B1—>A1 is a data signal of the SPI interface . 

We measured the signal on A1 and A2 pins as below. CH1=A1 Pin=Data signal. CH2=A2 pin=CLK signal. We found the data signal is not stable during high level.

Then we disconnect the CLK signal from 5V MCU to B2 pin and only let Data signal go through from B1—>A1. Then we measured the output data signal on A1 as below. The data signal becomes stable during high level.

So based on the above tests, it seems the clk signal through TXS0102 has a bad effect on its adjacent data signal. So do you have any advice on why this happens? Thanks.

By the way, the 3.3V and 5V power supply are both from LDO which is very stable.

Best regards,

Wayne

  • 0
    TI__Mastermind 45835 points

    Hey Wayne,

    It looks like there is a little bit of cross talk between the two channels. Is the amplitude of that ripple going to negatively affect anything?

  • 0 in reply to Dylan Hubbard
    TI__Expert 4380 points

    Hi Dylan,

    This ripple on the Data line won't affect the high/low level judgement. But this kind of cross talk waveform won't pass customer's internal review and if we want to win this device, we need to give them a reasonable explanation or remove this cross talk. 

    So is this cross talk issue a known issue and is it normal to happen when you transmit a data signal and a clk signal at the same time? How can we get rid of this cross talk? Thanks.

    Best regard,

    Wayne

  • 0 in reply to Wayne Wang20
    Guru 316940 points

    The TXS is mainly intended for bidirectional open-drain signals. Therefore, it does not actively drive its outputs high; the high voltage is weakly driven by pull-up resistors.

    For unidirectional signals, it would be a better idea to use a device with buffered outputs. A direction-controlled translator like the SN74LVC2T45 would work, but the simplest solution is a buffer with overvoltage-tolerant inputs like the SN74LVC2G17.

  • 0 in reply to Clemens Ladisch
    TI__Mastermind 45835 points

    Hey Wayne,

    There are so many variables involved with cross talk that its hard to provide a root cause with the limited info I have to work with. I recommend looking at articles like this one that go into great detail on cross talk and how to reduce it.

    For this device, having weak DC drive will not help and Clemens offers some great suggestions for other devices that can work here.