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SN74LVC8T245: SN74LVC8T245PWR Overshoot and undershoot

Part Number: SN74LVC8T245
Other Parts Discussed in Thread: SN74AHCT245

Hi

I am using SN74LVC8T245PWR for level translating 3.3V to 5V operating at 3 KHz pulse. A side of buffer connected to 3.3V and B side connected to 5V

I am observing transient overshoot of +2.5V and undershoot of -2.5V for 20 ns duration under no load condition. Is this behavior is due to fast rise and fall times of CMOS buffer.

How do I reduce it ?

Do you have any TTL buffer with same package having slow rise and fall times.

Regards

Sai Kiran S

  • Overshoots of this magnitude are likely to be measurement artifacts, usually caused by a long ground lead. Please show a photograph of your test setup.

    AHC devices have weaker output drivers. There is no exact replacement, but the SN74AHCT245 can put on the same footprint if you ignore the four outermost pins.

  • Hi

    Yes I agree, due to ground inductance this overshoot and and undershoot may arise.

    But I have done clear measurement using very shortest ground lead connecting to nearby circuit node. There is no error in the measurement.

    When I add shunt capacitor around 1nF across this signal, then the signal seems to be OK.

    What is the maximum capacitive load drive capability of this buffer ?

    Regards

    Sai Kiran S.

  • A short lead is still too long, and "nearbey" is too far away. Use a ground spring to a GND pin.

    In general, logic devices are designed for at most 70 pF; with larger capacitances, the output current is likely to exceed the absolute maximum ratings.

    The simplest way to reduce reflections from the trace acting as a transmission line is to add source termination, i.e., a series resistor (try 47 Ω) at the output pin.

  • With Ground spring also checked the same issue is persisting.

    I do not have the option to place series resistor. I can only reduce the rise time by placing the shunt capacitor across the signal.

    But 70 pF seems to be low load capacitance value. Please find below the overshoot and undershoot of the output device. The same buffer I used with VCCB as 3.3V, but there is no such issue observed, with 5V VCCB only why overshot and undershoot present.

  • Hey Sai,

    As Clemen's mentioned, using this cap method will most likely cause issues with high transient current. This method is not recommended. If you can't add a source resistor or reduce the inductance anymore at the output, then there really isn't much else that can be done. Outputs are stronger with a higher supply which is why its more apparent at 5V.