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SN74LV165A: SN74LV165A SER pin usage

Part Number: SN74LV165A
Other Parts Discussed in Thread: TIDA-01509

Dear Sir,

From TI reference design (TIDA-01509, https://www.ti.com/lit/pdf/tidrvh7), the U1 QH pin connect to U2 SER pin.

I am wondering to know what the layout length constraint is between one serial output QH to another register’s serial input SER.

Do we need to consider the propagation delay when layout design?

  • Hello,

    The QH to SER connection can be relatively long, but you shouldn't exceed 70pF total capacitive load on that trace.

    The largest timing concern is that either U1 and U2 receive the CLK signal at the same time, or U2 receives the clock first. If there is a significant delay and U1 is the first to receive the clock, it's possible to lose data between the two devices (ie QH changes before U2 reads the SER input).