CD74HC4046A: frequncy calculation

Hi Jan,

Jan Bock said:

Another problem I couldn't understand the 400kHz Offset frequency which is indicated for R2=220kOhm and C1=1nF (page 11) but in the diagram in figure 28 this isn't possible because a value between 150k and 1,5M should be a offset frequency between 10kHz and 100kHz.

It looks like this is an issue in more than one datasheet - I pulled up our SN74LV4046A and saw the same offset, but I have one on my bench right next to me with this setup and its offset is ~30kHz, which is exactly what the plots indicate:

I believe that should say "30 kHz" as the typical offset under the given conditions, however my testing has been extremely limited.

I'll make a note that we should test and fix this in the next datasheet revision for both devices.

Jan Bock said:

So my question is how I could calculate the estimated frequency for a dedicated setup and as well estimate the error for part tolerances?

I don't know of a way to calculate this directly.

Because everything is log-linear with these devices, and there are nonlinearities in operation, I would highly recommend using the datasheet plots to get your initial part selections completed, and then move on to a prototype to verify that the device operates the way you need with the selected components. I would also recommend using the SN74LV4046A, as it is much newer and works the same.

As far as error due to component tolerances -- none of the 4046 VCO's are guaranteed for maintaining a particular frequency over all process, temperature, and voltage fluctuations, so there's really no telling. There are VCO's out there that are guaranteed for this type of thing, but you won't find them at the same cost

They are intended for use inside a digital PLL, where the frequency of the VCO is controlled by a feedback loop, thus updating / fixing any issues with variations.

If you want to attempt to determine error due to external components (R1, R2, C1), you should know these things:

(1) The VCO is essentially a constant current source into a capacitor -- the capacitor size directly impacts the charge rate, which inversely affects the frequency of operation. Ie decrease in capacitance = faster oscillations. This is a log-linear relationship, which you can see in Figures 11 through 15. The log-linear slope is approximately -1.

(2) The timing resistors are used to control current mirrors that feed into the constant current capacitor charging circuit -- variations in the resistor value will be inversely proportional to current changes in the oscillator. Ie smaller resistor = more current = faster charge = higher frequency. This can be seen in the same figures as the offset in the lines, and also has a log-linear slope of approximately -1.

(3) The two mirror currents are internally summed to give the final charge current on the capacitor -- ie the resistor errors add up here.